Regviz

Atmel /AT91SAM9G20 /ADC /CDR[0]

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CDR[0]

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https://regviz.com/r/Atmel/AT91SAM9G20/ADC/CDR[0]#0x0

31282724232019161512118743000000000000000000000000000000000000000000DATA

Description

Channel Data Register

Fields

DATA

Converted Data

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data